Generally, semiconductor devices include a plurality of circuits which form an integrated circuit (IC) fabricated on a semiconductor substrate. A complex network of signal paths will normally be routed to connect the circuit elements distributed on the surface of the substrate. Efficient routing of these signals across the device requires formation of multilevel or multilayered schemes, such as, for example, single or dual damascene wiring structures. The wiring structure typically includes copper, Cu, since Cu based interconnects provide higher speed signal transmission between large numbers of transistors on a complex semiconductor chip as compared with aluminum, Al, based interconnects.
Within a typical interconnect structure, metal vias run perpendicular to the semiconductor substrate and metal lines run parallel to the semiconductor substrate. Further enhancement of the signal speed and reduction of signals in adjacent metal lines (known as “crosstalk”) are achieved in today's IC product chips by embedding the metal lines and metal vias (e.g., conductive features) in a dielectric material having a dielectric constant of less than 4.0.
In the prior art, two different types of capping layers for protecting the conductive feature of an interconnect structure can be used. One type of capping layer comprises a dielectric capping material, while the other type of capping layer comprises a metallic capping material. Although both types of capping layers are available, the metallic capping layer typically has better (i.e., increased) adhesion strength to the underlying conductive feature as compared to that obtained using a dielectric capping layer.
The increased adhesion strength provided at the conductive feature/metallic capping layer interface results in better electromigration resistance as compared to the case when a dielectric capping layer is employed. For example, the selective deposition of a Co alloy on a Cu interconnect has been demonstrated to have a greater than 10 times electromigration resistance than the interconnect including a standard dielectric capping material.
Despite the improvement in electromigration resistance, the use of a metallic capping layer provides an interconnect structure in which metallic residue is present on the surface of the dielectric material between each conductive feature. This problem in prior art interconnect structures is shown in FIG. 1. Specifically, FIG. 1 shows a prior art interconnect structure 10 that includes a dielectric material 12 which has conductive features embedded therein. The conductive features include a conductive material 16 which is located within an opening provided in the dielectric material 12. The conductive material 16 is separated from the dielectric material 12 by a diffusion barrier 18. A metallic capping layer 20 is present on the upper exposed surface of each conductive feature, i.e., atop the conductive material 16. As shown, metallic residue 22 forms on the exposed upper surface of the dielectric material 12 during the formation of the metallic capping layer 20.
The presence of the metallic residue 22 between each of the conductive features hinders the reliability of the prior art interconnect structure 10 and has delayed using metallic capping layers for the last three generations.
In view of the above, there is a need for providing a new and improved interconnect structure which employs metallic capping layers atop the conductive features, while eliminating metallic residue from the dielectric material that is located between each conductive feature.